To further enhance test performance, the T5503HS automatically generates cyclic redundancy check (CRC) codes and command/address (CA) parity codes to match the I/O data rates and address of any DUT. This enables quick and efficient development of new test programs, which reduces the demands on customers’ resources while also improving the time to market for new semiconductor designs.
High-speed test solution up to 4.5 Gbps
Advantest’s T5503HS system provides an optimal test solution for double-data-rate SDRAMs and other next-generation memory chips. The tester can operate at speeds up to 4.5 Gbps, fast enough to perform full-coverage testing of the most advanced memories. In addition, the system uses individual level settings and data-bus inversion (DBI) to maximize throughput in testing high-speed devices.
Capable of testing up to 512 DDR4-SDRAM devices in parallel
Optimized for productivity, the T5503HS is a cost-effective, high-volume test solution capable of testing up to 512 DDR4-SDRAM devices in parallel. The system’s real-time source-synchronous function enables high throughput. Additionally, an advanced timing-training capability helps to identify the most effective test solution faster than other systems on the global market. Together, these functions allow the T5503HS tester to achieve much higher productivity than software-based systems.
Thông số kỹ thuật
| Target Devices |
DDR4-SDRAM, LPDDR4-SDRAM, etc. |
| Parallel Testing |
Up to 512 devices per system |
| Test Speed |
Up to 4.5 Gbps |